Electrostatic discharge (ESD) is one of destructive and unavoidable phenomena that electric systems and integrated circuits are attacked. From the electric view, ESD is a transitional high current phenomenon such that a peak current of several amperes continues for a period of time from 10 n sec to 300 n sec. Therefore, when ESD is generated, an integrated circuit is damaged so that it is hardly repaired, or its volume breaks down or deteriorates so that it does not work normally unless a current of several amperes is conducted outside the integrated circuit within several nano sec. Furthermore, the lightening, thinning and downsizing for electronic parts or electronic apparatuses advance rapidly in recent years. With the rapid progress, the degree of integration in semiconductors and the density of electronic parts mounted on printed wiring boards are increased remarkably with the result that integration is minute, or electronic elements or signal conductors mounted are present very closely each other. Under these circumstances, high frequency radiation noise is easily caused together with the accelerating of the signal-processing rate.
Conventionally, as an element for protecting from static electricity, which protects IC etc. in circuits from ESD, JP-A-2005-353845 discloses an element having a bulk structure, which comprises a sintered matter of a metal oxide etc. This element is a laminated chip varistor made from the sintered matter and is equipped with a laminate and one pair of external electrodes. The varistor has a property such that when the applied voltage reaches a certain value, the current, which has not been flown until now, begins to flow suddenly, and also has excellent blocking force to electrostatic discharge. However, in the production of the laminated chip varistor, which is a sintered matter, a complicated production process including sheet molding, internal electrode printing, sheet lamination, etc. is inevitable and the production also has a problem that delamination and other wrong conditions are easily caused during mounting.
JP-A-2007-266479 discloses a protective element that on an insulating substrate, a discharge gap of 10 μm to 50 μm is formed and between one pair of electrode patterns which ends are faced each other, a functional film, which comprises ZnO as a main component and silicon carbide, is formed. As compared with the laminated chip varistor, the protective element has a merit that it can be produced on a substrate as a thick film element having a simple composition.
For these ESD protective elements, the reduction of the mounted area has been undertaken according to the progress of electronic apparatuses. However, since an element is mounted on a wiring substrate by soldering, the degree of the freedom in the design is low and it has limitations of the size including height. On this account, the provision for ESD does not limit to elements, and further, it is desired that the provision for ESD be practiced on a necessary part and a necessary area.
WO/2001/523040 is a document that a resin composition is disclosed as an ESD protective material. This resin composition comprises a base material made from a mixture of an insulating binder, conductive particles having an average particle diameter of less than 10 micron and semiconductor particles having an average particle diameter of less than 100 micron. Furthermore, WO/2001/523040 also discloses the US patent invented by Hyatt et al and discloses a composition material that a mixture of conductive particles which surfaces are covered with an insulating oxide film, and semiconductor particles is combined by an insulating binder, a composition material which particle diameter range is determined, and a composition material that the surface gaps among conductive particles are determined. The methods described in the publications have technically unstable problems such that a high electric resistance value is not obtained at a low voltage or a low electric resistance value is not obtained at a high voltage, because the method of dispersing the conductive particles and the semiconductor particles is not optimized.
Moreover, the process for producing the electrostatic discharge protector has the following difficult problems. For example, the electrostatic discharge protector is required to have a high insulating resistance property at a normal operating voltage (usually the voltage shows less than 10 V). When an insulating member is not disposed between electrodes, aerial discharge is caused by application of a high voltage, and the electrodes are short-circuited by carbonization of a substrate provided with the electrodes. Therefore, it is necessary to dispose any member having voltage resistance between the electrodes. When the conductive member is only disposed but the insulating member is not disposed, the insulating resistance is not maintained. Therefore, it is essential that the insulating member is disposed in the gap between one pair of the electrodes. In the trial, when the insulating member is disposed so as to be bridged between the electrodes, it is possible to add high insulating resistance at a normal operating voltage and low electric resistance at the time of electrostatic discharge by optimizing the distance between the electrodes to the providing insulating member.
For example, when the filler-free resin is used for the insulating member, the property as the electrostatic discharge protector is confirmed by determining the distance between the electrodes to 5 to 7 μm. However, when the electrostatic discharge protector comprises only one pair of the electrodes and the insulating member, it is difficult to produce it industrially because the proper distance of the electrodes is changed by a fine difference on quality in the insulating member and the permissible range of the distance between the electrodes is very small.